1. Field of the Invention
The present invention relates to an overvoltage protection circuit, and more particularly to an output stage MOS transistor overvoltage protection circuit for driving an inductance load.
2. Description of Related Art
Recently there are growing demands for increasing a withstand voltage of surge destruction for a power switch to be installed to a car. For example an inductance (L) load such as solenoid or an inductance element of wire harness is connected to an output stage of a power switch to be installed to a car. If L load is connected to an output stage of a power switch, a back electromotive force is generated on turn-off, thereby applying a negative surge voltage to an output terminal. If a voltage of the negative surge voltage exceeds the withstand voltage to destruction of an output stage transistor of a power switch, the output stage transistor breaks down and a breakdown current flows. An output stage transistor may deteriorate due to this breakdown current. Therefore the power switch protects the output stage transistor from an overvoltage generally using an overvoltage protection circuit (for example a dynamic clamping circuit). An example of the overvoltage protection circuit according to a conventional technique is shown in FIG. 2.
In an overvoltage protection circuit 500 of the conventional technique shown in FIG. 2, a drain of an output MOS transistor 508 is connected to a first power supply (for example battery voltage, Vbat) 501. A source of the output MOS transistor 508 is connected to a second power supply 502 via a load 509. An output terminal 505 is connected to a node between the output MOS transistor 508 and the load 509. One terminal of a gate resistance 506 is connected to a gate of the output MOS transistor 508. A first control signal 503 is inputted to another terminal of the gate resistance 506.
A gate charge discharging circuit 507 is connected between another terminal of the gate resistance 506 and the output terminal 505. The gate charge discharging circuit 507 uses one MOS transistor. A drain of the MOS transistor is connected to the gate resistance 506, its source is connected to the output terminal 505, and a second control signal 504 is inputted to its gate. A dynamic clamping circuit 510 is connected between the gate of the output MOS transistor 508 and the first power supply 501. In the dynamic clamping circuit 510, a zener diode 511 and a diode 512 are connected in series. The overvoltage protection circuit 500 controls the output MOS transistor 508 to be conductive or non-conductive condition by a first control signal 503. If the output MOS transistor 508 is non-conductive, the gate charge discharging circuit 507 becomes conductive by the second control signal 504 to discharge a charge in the gate. That is, the first control signal 503 is reversed phase with the second control signal 504.
If the output MOS transistor 508 is turned off and the load 509 includes L element, a back electromotive force as shown in FIG. 3 is generated. The overvoltage protection circuit 500 protects the output MOS transistor 508 by operating the dynamic clamping circuit 510 if such back electromotive force is generated.
A protection operation as mentioned above is described hereinafter in detail. If a back electromotive force is generated and a negative voltage is generated in the output terminal 505, a voltage in the gate of the output MOS transistor 508 also becomes negative because the gate charge discharging circuit 507 is conductive. In a case a voltage difference between the negative voltage and the voltage of the first power supply 501 becomes larger than a specified dynamic clamp voltage, the dynamic clamping circuit operates, and a voltage between the drain and the gate of the output MOS transistor 508 is restricted to the dynamic clamp voltage. The output MOS transistor 508 is conductive at this time. Accordingly the voltage between the drain and the source of the output MOS transistor 508 is add the dynamic clamp voltage to a threshold voltage of the output MOS transistor 508. Therefore, a device can be protected from overvoltage by controlling the voltage between the source and the drain of the output MOS transistor 508, while flowing a current in the load 509 using a channel resistance of the output MOS transistor 508.
However in the overvoltage protection circuit 500, the first power supply 501 may be applied by a surge called a dump surge. The dump surge is a surge applied to the first power supply 501 as a positive voltage, in a case a battery terminal is disconnected while generating electricity for an alternator. The dump surge is 5 shown in FIG. 4. If the surge voltage is higher than the dynamic clamp voltage, the output MOS transistor 508 becomes conductive. This causes a large current to flow in the output MOS transistor 508, creating possibility for thermal destruction. A relationship between a first power supply 501 and a gate voltage of the output MOS transistor 508 in a case the dump surge voltage is higher than the dynamic clamp voltage, and a current that flows in the output MOS transistor 508 at such times are shown in FIG. 5. In the shaded area of FIG. 5, the gate voltage of the output MOS transistor 508 is rising. Further, a large current is flowing to the output MOS transistor 508 during the shaded period.
To resolve the abovementioned problem, configurations of the dynamic clamp voltage must satisfy the following conditions;
(1) Withstand voltage of the output MOS transistor>Dynamic clamp voltage>Dump surge voltage
(2) Dump surge voltage>Absolute maximum rating
However if there is no difference between the dump surge voltage and a withstand voltage of the output MOS transistor, it is difficult to appropriately configure the dynamic clamp voltage due to variations in production tolerance of the dynamic clamping circuit 510. The relationship of the voltages is shown in FIG. 6. An overvoltage protection circuit according to another conventional technique that is not restricted by the abovementioned condition (1) is disclosed in the Japanese Unexamined Patent Application Publication No. 2005-109162. An overvoltage protection circuit 600 of another conventional technique is shown in FIG. 7.
As shown in FIG. 7, in the overvoltage protection circuit 600 as compared to the overvoltage protection circuit 500, a control switch 601 is connected between the dynamic clamping circuit 510 and the power supply 501. Further, the surge detection circuit 602 for controlling the control switch 601 is connected between a gate of the control switch 601 and the first power supply 501. The surge detection circuit 602 is a circuit for detecting a dump surge voltage higher than the dynamic clamp voltage. Further, the control switch 601 is a switch that becomes non-conductive if the surge detection circuit 602 detects a dump surge voltage higher than the dynamic clamp voltage.
The overvoltage protection circuit 600 practically operates in the same way as the overvoltage protection circuit 500 as for the negative voltage surge. If a dump surge is applied, the surge detection circuit 602 detects a dump surge voltage to make the control switch non-conductive, so that the dynamic clamping circuit 510 does not operate.
Accordingly if a dump surge voltage higher than the dynamic clamp voltage is applied to the first power supply 501, the dynamic 25 clamping circuit 510 can be disabled, accordingly the output MOS transistor 508 will not be conductive. Therefore, a large current does not flow in the output MOS transistor 508, enabling to prevent the output MOS transistor 508 from thermal destruction. Withstand voltage to destruction for the output MOS transistor 508 is designed to be higher than the dump surge voltage, thus the output MOS transistor 508 will not be destroyed.
Further, the surge detection circuit 602 detects a dump surge voltage higher than the dynamic clamp voltage and disables the dynamic clamping circuit 510. It is therefore not restricted by the above condition (1) in a configuration of the dynamic clamp voltage.
However even with the overvoltage protection circuit 600, if there is no difference in the absolute maximum rating and the dynamic clamp voltage, there still remains a problem in a circuit operation.
For example, if the dynamic clamp voltage fluctuates to a lower voltage, the surge detection voltage becomes higher than an actual dynamic clamp voltage. Accordingly there is a possibility that the dynamic clamping circuit 510 unintendedly operates even with a dump surge voltage lower than the absolute maximum rating, and eventually the dynamic clamping circuit 510 is destroyed by the dump surge. There is another problem that the number of devices in a circuit increases because a logic circuit is required for the surge detection circuit 602.